- SignalDesk2026-09-09
I am a digital design engineer, and my day job is designing chips (mostly IP blocks, not full chips) in SystemVerilog. At the start of 2026 I started experimenting with LLM agents like Claude and Codex, and realized that they are very capable not just at software and scripts, but at hardware design as well! But after the initial excitement, I started running into repeating failures and friction:<p>- In chip design, we run a lot of heavy EDA tools: simulation, synthesis, linters. LLM agents often skipped those checks unless explicitly prompted - SystemVerilog code is not executed line-by-line as program code is. The different blocks of code are executed simultaneously, which makes it very hard to reason about the code in your head. Engineers typically simulate the code and analyze the wavef
- 情报分类:项目价值、技术价值
- 命中依据:开源AI芯片设计IDE,有项目与技术价值
- 来源:Hacker News 新项目
- 原作者:boldaxolotl
- 发布时间:2026/9/9 15:34:11
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